May 28th, 2024 
Daniela Lopez de Luise Papers on any of the following and related topics can be submit-
• Autonomous/adaptable/reconfigurable systems and archi-
tectures.
• Security, safety, reliability and multi-objective optimization
of embedded and cyber-physical systems.
software – specification, modelling, analysis, validation and
testing.
• Design automation.
• Formal methods in system, hardware and embedded software design.
• Systems-on-a-chip, networks-on-a-chip and systems-in-a-
package.
• High-performance, energy-efficient multi-core and many-
core (heterogeneous) processor architectures.
• Future trends, new applications and new technologies.
DSD Special Sessions
AHSA Architectures and Hardware for Security Applications P. Kitsos, M. Novotny
ASHWPA Advanced Systems for Health Wellness and Personal Monitoring F. Leporati, R. Stojanovic, E. Marenzi
DDVC Digital Design and Verification with Chisel M. Schoeberl
DTFT Dependability, Testing and Fault Tolerance in Digital Systems P. Fiser, H. Kubátova
EPDSD European Projects in Digital Systems Design L. Jozwiak, F. Leporati, E. Torti
HIAAA Hyperspectral Imaging Applications, Algorithms and Architectures G. M. Callico, H. Fabelo, S. Ortega
HSTIEC Hardware, Software, and Tools for the IoT-to-Edge-to-Cloud Continuum F. Aromolo, D. Casini, G. Rossolini
MATTERV Opensource Methods, architectures, tools and technologies for RISC-V S. Pillement, K. Martin
SDSD Sustainable Digital System Design T. Marty, T. Scheipel, M. Baunach
SPCPS Safety, Security and Privacy of Cyber-Physical Systems S. Dey, S. Park, J. Sepúlveda
Submission Guidelines
Authors are encouraged to submit their manuscripts via EasyChair https://eur02.safelinks.protection.outlook.com/?url=https%3A%2F%2Feasychair.org%2Fconferences%2F%3Fconf%3Dd2024&data=05%7C02%7C%7C382f258d26c0411473fd08dc7a54ebe2%7Ccc7df24760ce4a0f9d75704cf60efc64%7C0%7C0%7C638519756866411181%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C40000%7C%7C%7C&sdata=X74Mw%2FYxgwYbY%2B4As5NVk%2FgnuwxTtUoQDH0M5uYRDag%3D&reserved=0. IEEE Confer-
ence Publishing Services (CPS) will publish accepted papers in the conference proceedings and the proceedings will be submitted to
the IEEE Xplore Digital library. All details regarding the submission are available at https://eur02.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdsd-seaa.com%2Fdsd2024%2F%23sumbmission-&data=05%7C02%7C%7C382f258d26c0411473fd08dc7a54ebe2%7Ccc7df24760ce4a0f9d75704cf60efc64%7C0%7C0%7C638519756866421183%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C40000%7C%7C%7C&sdata=v6wLHnvlXDm9tlEzUnnKYp7z8kgjSvx7gWFu8kvv4Uc%3D&reserved=0
guidelines.
Important Dates
Abstract sub.: 27.05.24 (AoE)
Paper sub.: 03.06.24
(AoE) Acceptance: 28.06.24
Camera ready: 11.07.24
Journal Publication
Authors of the selected best papers will be invited to submit extended versions of their research to the ISI indexed Euromicro/Elsevier
journal ”Microprocessors and Microsystems: Embedded Hardware Design” (MICPRO) which has an 2022 Impact Factor of 2.6 and
Cite Score of 4.9.
General Chairs
• Andrea Pinna (University of Sorbonne, FR), email : andrea.pinna@lip6.fr
• Lilia Zaourar (CEA, FR), email: lilia.zaourar@cea.fr Program Chairs
• Tomasz Kryjak (AGH University of Krakow, PL), email : tomasz.kryjak@agh.edu.pl
• Frédéric Pétrot (Grenoble Alpes University, FR), email: frederic.petrot@univ-grenoble-alpes.fr
Publication Chair
• Amund Skavhaug (Nor. Inst. of Sci. and Technology, NO)
Publicity Chair
• João Canas Ferreira (Univeristy of Porto, PT)
Finance Chairs
• Francesco Leporati (University of Pavia, IT)
• Karl-Erwin Grosspietsch (Euromicro, DE)
DSD Steering Committee
• Lech Józwiak (Eindhoven University of Technology, NL) – Chairman
• Paris Kitsos (University of Peloponnese, GR)
• Tomasz Kryjak (AGH University of Krakow, PL)
• Hana Kubatova (Czech Technical University in Prague, CZ)
• Francesco Leporati (University of Pavia, IT)
• José Silva Matos (University of Porto, PT)
• Smail Niar (Polytechnic University of Hauts de-France, FR)
• António Nuñez (Univer. of Las Palmas de Gran Canaria, ES)
• Eugenio Villar (University of Cantabria, ES)
DSD Technical Program Committee
• Ihsen Alouani (Queen’s university Belfast, UK)
• Liliana Andrade (Universite Grenoble Alpes)
• Federico Aromolo (Scuola Superiore Sant’Anna)
• Mohamed Benazouz (CEA LIST DILS LISE)
• Hadjer Benmeziane (IBM Zurich, Switzerland)
• Jalil Boukhobza (ENSTA-Bretagne)
• Fabien Bouquillon (Università degli studi di Modena e Reggio Emmilia)
• Halima Bouzidi (Queen’s university Belfast, UK)
• João Canas Ferreira (Univeristy of Porto)
• José Cano (University of Glasgow)
• Alessandro Capotondi (University of Modena and Reggio Emilia)
• Pedro P. Carballo (University of Las Palmas de Gran Canaria)
• Antonio Carlos Schneider Beck (Federal University of Rio Grande do Sul)
• Daniel Casini (School of Advanced Studies Sant’Anna)
• Tom Chen (Colorado State University)
• Alessandro Cilardo (University of Naples Federico II)
• Giovanni Danese (University of Pavia)
• Karol Desnos (INSA Rennes)
• Tiago Dias (Instituto Superior de Engenharia de Lisboa)
• Rolf Drechsler (University of Bremen)
• Miguel Figueroa (Universidad de Concepcion)
• Petr Fišer (Czech Technical University in Prague)
• Ghayoor Gillani (University of Twente)
• Roberto Giorgi (University of Siena)
• Ouarnoughi Hamza (Polytechnic University of Hauts de-France)
• Roel Jordans (Eindhoven University of Technology)
• Lech Jozwiak (Eindhoven University of Technology)
• Ercan Kalali (Eindhoven University of Technology)
• Oliver Keszocze (University of Erlangen–Nuremberg)
• Paris Kitsos (University of Peloponnese)
• Mateusz Komorkiewicz (IEEE: VTS Chapter)
• Tomasz Kryjak (AGH University of Krakow)
• Hana Kubatova (Czech Technical University in Prague)
• José L. Abellán (University of Murcia)
• Alexey Lastovetsky (University College Dublin)
• Francesco Leporati (University of Pavia)
• Alberto Marchisio (New York University)
• Maurizio Martina (Polytechnic University of Turin)
• Jose Matos (University of Porto)
• Antonio Miele (Polytechnic University of Milan)
• Sajid Mohamed (ITEC)
• Sergey Mosin (Kazan Federal University)
• Vojtech Mrazek (Brno University of Technology)
• Nadia Nedjah (State University of Rio de Janeiro)
• Smail Niar (Polytechnic University of Hauts de-France)
• Antonio Nuñez (IUMA-ULPGC)
• Arnaldo Oliveira (University of Aveiro)
• Alex Orailoglu (University of California San Diego)
• Ozcan Ozturk (Bilkent University)
• Christian Pilato (Polytechnic University of Milan)
• Thilo Pionteck (Otto von Guericke University Magdeburg)
• Sai Manoj Pudukotai Dinakarrao (George Mason University)
• Frédéric Pétrot (Grenoble Alpes University)
• Yang Qu (Broadcom)
• Davide Quaglia (University of Verona)
• Alfonso Rodriguez (Technical University of Madrid)
• Sepideh Safari (Institute for Research in Fundamental Sciences)
• Mazen Saghir (American University of Beirut)
• Tobias Scheipel (Graz University of Technology)
• Jan Schmidt (Czech Technical University in Prague)
• Nicolas Sklavos (University of Patras)
• Radovan Stojanovic (University of Montenegro)
• Emanuele Torti (University of Pavia)
• Miroslav Velev (Aries Design Automation)
• Eugenio Villar (University of Cantabria)
• Chao Wang (University of Science and Technology of China)
• Arda Yurdakul (Bogaziçi University)
• Andrej Zemva (University of Ljubljana)
DSD/SEAA Keynote speakers
1. Yervant Zorian (Synopsys, Armenia)
Dr. Yervant Zorian is a Chief Architect and Fellow at Syn-
opsys, as well as President of Synopsys Armenia. For-
merly, he was Vice President and Chief Scientist of Vi-
rage Logic, Chief Technologist at LogicVision, and a Distin-
guished Member of Technical Staff ATT Bell Laboratories.
He is currently the President of IEEE Test Technology Tech-
nical Council (TTTC), the founder and chair of the IEEE
1500 Standardization Working Group, the Editor-in-Chief
Emeritus of the IEEE Design and Test of Computers and an
Adjunct Professor at University of British Columbia. He
served on the Board of Governors of Computer Society
and CEDA, was the Vice President of IEEE Computer So-
ciety, and the General Chair of the 50th Design Automation Conference (DAC)
and several other symposia and workshops. Dr. Zorian holds 35 US patents,
has authored four books, published over 350 refereed papers and received nu-
merous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the
2005 recipient of the prestigious Industrial Pioneer Award for his contribution to
BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He
received the IEEE Distinguished Services Award for leading the TTTC, the IEEE
Meritorious Award for outstanding contributions to EDA, and in 2014, the Re-
public of Armenia’s National Medal of Science. He received an MS degree in
Computer Engineering from University of Southern California, a PhD in Electri-
cal Engineering from McGill University, and an MBA from Wharton School of
Business, University of Pennsylvania.
Title: Challenges and Opportunities of Silicon Lifecycle Management for Chiplets
3DICs
Abstract: With increasing system complexity and stringent runtime require-
ments for AI accelerators, high-performance computing and autonomous ve-
hicles, reliable, safe and secure operation of electronic systems are still a major
challenge, particularly, with the increased use of third party chiplets and multi-
die systems. This keynote will focus on optimizing silicon health by using ad-
vanced solutions throughout the silicon life cycle stages, from chiplet design, to
bring up, volume production, tmid-stack, 3D packaging and in-field operation.
The advanced solutions for silicon lifecycle management (SLM) to be discussed
will starts by embedding a range of monitoring engines in different levels of the
design, access mechanisms and solutions for on-chip and across the chips net-
work, as well as data analytics on the edge and in the cloud for fleet optimization
2. Ana Cavalcanti (University of York, UK)
Ana Cavalcanti is a Professor at the University of York,
UK, and holds a Royal Academy of Engineering Chair in
Emerging Technologies. In that role, she is Director of the
RoboStar centre on Software Engineering for Robotics.
She previously held a Royal Society Industry Fellowship,
which provided her with the ideal opportunity to un-
derstand and contribute to the practice of formal meth-
ods working with QinetiQ. Her main scientific achieve-
ments have been on the design and justification of sound
refinement-based program development and verification
techniques. She has covered theoretical and practical
integration with industry-strength technology: concur-
rency, object-orientation, and testing, dealing now with mobile and autonomous
robots. She has led the development and justification of refinement theories,
notations, and techniques, and tools to cope with control systems. Her work
provides support for graphical notations popular with engineers, and for main-
stream programming languages. It is distinctive in that it has comprehensive
coverage of practical languages, rather than idealised notations. It also supports
high degrees of automation to enable usability and scalability. She has chaired
the Programme Committee of leading conferences, and been a member of nu-
merous Programme Committees. Currently, she is the Chair of the Formal Meth-
ods Europe Board.
Title: Systematic testing of a drone for emergency relief
Abstract: Recent surveys suggest that, within the field of robotics, there is a
prevailing tendency to employ a manual ad hoc testing approach, heavily re-
liant on the expertise of developers. However, this method proves to be costly
and comes with various drawbacks, including the inability to assess the fault-
detection capabilities of the test set, potential errors in test specification and ex-
ecution, and the possibility of expert disagreement on test outcomes. In this pre-
sentation, we share our experience with the adoption of the innovative RoboStar
systematic testing approach for a firefighting UAV, developed using the widely
adopted ROS middleware. The RoboStar framework advocates a model-based
approach in control software development for robotics, offering domain-specific
tool-independent notations for modeling and simulation, along with techniques
for the automatic generation of artifacts. Our focus in this talk, centers on the
RoboStar techniques for automated test generation. Through our approach, we
effectively reduce testing expenses and can provide guarantees regarding the
absence of faults within specified classes.
3. Philippe Notton (SiPearl, France)
Philippe Notton is the CEO and Founder of SiPearl,
the French company designing the European high-
performance, low-power microprocessor. His original vi-
sion of SiPearl came in 2015 while he was leading a di-
vision of 2400 engineers at STMicroelectronics. In 2017,
he joined Atos to set up the European Processor Initia-
tive (EPI) consortium, which aimed to foster the return of
high-performance microprocessor design to Europe. In
June 2019, he launched SiPearl as a spin-off of the EPI
with the support of the European Union. He assembled
a team of experts and managers from Atos, STMicroelec-
tronics, Marvell, Intel, Nokia and MediaTek and now em-
ploys more than 170 engineers in France (Maisons-Laffitte, Grenoble, Massy,
Sophia Antipolis), Germany (Duisburg) and Spain (Barcelona). SiPearl’s first gen-
eration microprocessor, named Rhea1, will equip JUPITER, the first European ex-
ascale supercomputer. As a senior executive, Philippe Notton has built an out-
standing track-record in the multimedia, semiconductor and security fields. Pas-
sionate about high technology and fast-moving environments, he has worked
in France, the UK and the US for market-leading groups (Thomson, Canal+, LSI
Logic, STMicroelectronics, Atos), as well as a successful startup (MStar Semi-
conductor, sold to MediaTek in 2012 for US$4B). Philippe Notton is a Supélec
engineer (1993) and has an Executive MBA from ESSEC Mannheim (2008).
Title: The European high-performance low-power microprocessor, ultimate so-
lution for LLM
Abstract: The Large Language Model (LLM) is a new form of generative AI de-
signed to understand, process, and generate human-like language. Nowadays,
its integration into enterprises operations is crucial to develop their business
and improve their efficiency. Until now, most of LLM are managed using GPU
or dedicated accelerators. But, their cost combined to their low availability on
the market and their level of energy consumption are prompting us to turn to
other solutions. In this context, the European high-performance low-power mi-
croprocessor with built-in High Bandwidth Memory (HBM) will be the ultimate
solution for LLM workloads. The LLM’s workflow can be divided into three steps:
(1) sanitizing and extracting features, (2) building/training founding models, then
(3) fine-tuning and using models. (1) is to collect, identify and extract relevant
features from the raw data. (2) is to provide generic founding models, a task
done by the ecosystem of AI start-ups and hyperscalers. The last step (3) is to
integrate these models in enterprises’ daily business. It requires to specialize
model for specific tasks (fine-tuning) and to efficiently query it to obtain to pro-
duce actionable outputs (inference). While step 1 is already done on CPU, the
other steps are still performed on GPU. This talk describes why and how other
tasks can be carried out more advantageously on the European microprocessor
with built-in HBM. The talk covers inference, fine-tuning and training. It demon-
strates among other things the resilience of the European microprocessor which
is more flexible to model changes than solutions currently in use.
Detalied informations: https://eur02.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdsd-seaa.com%2Fkeynotes%2F&data=05%7C02%7C%7C382f258d26c0411473fd08dc7a54ebe2%7Ccc7df24760ce4a0f9d75704cf60efc64%7C0%7C0%7C638519756866426054%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C40000%7C%7C%7C&sdata=FO504NmTPsMbvFtq7F8DERjmYEGdEY1Se%2Ba1%2FEepXXM%3D&reserved=0
4. Albert Cohen (Google DeepMind, France)
Albert Cohen is a research scientist at Google DeepMind.
He leads a team at the forefront of the acceleration and
energy-efficiency of machine learning models. An alum-
nus of École Normale Supérieure de Lyon and the Uni-
versity of Versailles (Paris Saclay), he first joined INRIA
as a research scientist, then also held a part-time (teach-
ing) associate professor position at École Polytechnique.
He has been a visiting scholar at the University of Illi-
nois, an invited professor at Philips Research then NXP as
a recipient of a Marie Curie technology transfer fellow-
ship, and a visiting researcher at Facebook Artificial In-
telligence Research. Albert’s work spans the theory and
practice of programming languages, parallelism, high-performance and power-
efficient computing, as well as safety-critical embedded control, resulting in 250
peer-reviewed publications together with 28 PhD students and international col-
laborators. Some of this work led to technology transfer, including contributions
to the industry standard GCC and LLVM compilers. Since joining Google, Albert
played an essential role in the design and adoption of the MLIR platform for scal-
able and efficient machine learning.
Title: Compilers for Performance Engineers: Oxymoron or Revolution?
Abstract: Closing the gap with the peak performance of modern computing sys-
tems involves a combination of skills, from high-performance computing to com-
puter architecture, with a dose of statistics and significant reverse engineering
hackery. This is nothing new and unlikely to change: when it comes to perfor-
mance, power, efficiency, it is the fundamental nature of computation, commu-
nication and storage set by the laws of physics to break the composable abstrac-
tions of high-level programming languages. Interestingly, many of the reverse
engineering tricks involve compilers. Unfortunately not in a good way, includ-
ing frustrations with the software stack and with compilers in particular. Per-
formance engineers often ditch higher level abstractions because of the chaotic
behavior of compiler optimizations. As a result, providing optimizing compilers
with better control or feedback has long been an important research area. We
will survey some of the challenges, partial successes, and research on controlling
optimizations and code generation, with a focus on compilers for machine learn-
ing acceleration. We will highlight ongoing work on constraint-guided methods
and scheduling languages showing the most promising impact on the effective-
ness and productivity of performance engineers.
5. Coral Calero (University of Castilla-La Mancha, Spain)
Coral Calero is Professor at the University of Castilla-La
Mancha in Spain and has a PhD in Computer Science. She
is a member of the Alarcos Research Group, being re-
sponsible of the “Green and Sustainable software” line
research, where two main lines of work are developed.
The first one addresses issues such as measuring the im-
pact that software and information systems have on the
environment and how to improve its energy efficiency, as
well as human and economic aspects related to software
sustainability. The second major line of work supports all
the group’s dissemination activities to raise awareness of
the impact that software has on the environment. Since
its creation in 2023, she has been one of the 12 members of the Spanish Research
Ethics Committee.
Title: Always look on the green side of software
Abstract: That software moves the world is a clear fact. And that it is becom-
ing more and more important, too. There are three aspects that have led to an
increase in the intensity with which software is used: the Internet and social net-
works, data and artificial intelligence. However, not everything is positive in the
support that software provides to our daily lives. There are estimates that ICT
will be responsible for 20% of global energy consumption by 2030, part of which
will be due to software. And precisely the three mentioned aspects require large
amounts of energy. In this keynote we will review different concepts related to
software sustainability, and we will show some results of software consumption
measurements that we have carried out on the one hand, cases carried out to
raise awareness in society in general about the impact that software has on the
environment. On the other hand, examples related to the consumption of data
and artificial intelligence carried out with the aim of creating a set of best prac-
tices for the software professionals. Our ultimate goal is to make you aware of
the consumption problem associated with software and to ensure that, if at first,
we were concerned with the “what” and later with the “how”, now it is time to
focus on the “with what”.
6. Danilo Pau (STMicroelectronics, Italy)
Danilo Pau is Technical Director, IEEE AAIA ST Fellow, AP-
SIPA Life Member in STMicroelectronics. Danilo (h-index
28, i10-index 74) graduated at Politecnico di Milano. He
worked on memory reduced HDMAC HW design, MPEG2
video memory reduction. on video coding, transcoding,
embedded (Khronos) 2/3D graphics, and (ISO/IEC/MPEG
CDVS and CDVA with Leonardo Chiariglione) computer vi-
sion. Currently, his work focuses on the ST Unified AI Core
Technology, a software environment to deploy machine
learning workloads on sensors and micro-controllers. He
supervises many students and enjoys publishing papers.
Title: nW Range Tiny Reconfigurable and Programmable
Inferences for Pascal Accurate Pressure Sensor Re-Calibration
Abstract: MEMS pressure sensors are widely used in various application fields
such as industrial, consumer, medical, and automotive. High volume and cost-
effective manufacturing procedure severely shapes these sensors. When they
are exposed to an increase in temperature, dust, humidity, and many other kinds
of stresses, these ultimately lead the sensor to drift in its pressure measure-
ments. Thermal stresses are a very important cause of sensor drifts. Exposure
to high levels of temperatures, for example due to soldering, can cause reading
deviations in the sensor’s response for hours (short terms) and even several days
(long terms). This speech will address two state of art low cost MEMS pressure
sensors under many relevant stress studies representing real-world application
scenarios. For example, one case study is dedicated to the drifts caused by the
soldering process during manufacturing with up to five reflow cycles. Another
one induced drift due to the exposure of the sensor to a thermal stress of 150
Celsius degree for 1000 hours. An aging test is about the sensor to be left at the
ambient temperature of 25 Celsius degree. Pressure measurements resulting
from these cases were acquired by several manufactured devices and compared
to the pressure measured by a golden reference barometer. In each case study,
data were grouped to achieve more accurate compensation. The drift compen-
sation was studied through several artificial neural networks and between them
an ultra-tiny temporal convolutional neural network was selected to predict the
pressure error for compensation. The model was implemented in software on
both a low power micro controller and programmable sensors as well as into re-
configurable hardware manufactured by a test chip. Quantitative accuracy and
implementation performances will be commented on. This work also paves the
way for future on-device learning technologies.
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